In the fabrication of semiconductor devices, such as integrated circuits, numerous processing steps are carried out in a controlled atmosphere at elevated temperatures. Such processes include oxidation, diffusion, chemical vapor deposition, and annealing. In elevated temperature processing, semiconductor wafers are held in an evacuated chamber, typically a quartz tube housed within an electric furnace which exhibits excellent temperature stability and is equipped with precise temperature controllers. Processing gases are introduced and withdrawn from the chamber under controlled flow conditions.
In recent years, vertical furnaces have replaced horizontal furnaces because they present a number of advantages, including elimination of cantilever loading and insertion of quartz boats containing the increasingly massive semiconductor wafers, automated loading and unloading, and a smaller clean room footprint. As a result of the automated loading, and lack of contact between the furnace tube and the wafer boats, processing in a vertical furnace provides low particulate material generation, which enhances yield and reliability.
Increasingly more important in the fabrication of VLSI devices having multiple layers of dielectrics and conductors are chemical vapor deposition (CVD) processes. Thin films are CVD deposited on the upper surface of semiconductor wafers in a controlled environment at elevated temperatures. CVD processes involve introducing reactant gases into a reaction chamber, and then decomposing and reacting the gases at a heated surface of a semiconductor wafer to form a thin film. Typical films deposited by CVD include polysilicon, silicon dioxide, silicon nitride, and silicon oxynitride.
A variety of CVD techniques have been developed which optimize certain parameters, including uniformity of film thickness, lower particulate generation, and increased throughput. At the same time, furnaces and associated equipment manufacturers have made numerous improvements aimed primarily at the same objectives.
A schematic representation of a typical vertical furnace is shown in FIG. 1, a typical furnace tube in FIG. 2, and a typical wafer boat in FIG. 3. In FIG. 1, furnace 10 includes an external housing 11 having a control panel 12, a vertical tube 13, and loading and unloading ports 15 for boats of wafers. Not shown are the various heaters which surround the furnace tube, and the vacuum and gas supply systems.
In FIG. 2, it can be seen that a typical vertical furnace tube 23 houses an inner liner 24, a heat insulating mounting pedestal 27 for positioning the wafer boat 26, and ports 28, 29 for inlet and outlet of gases. Tubes referred to as gas injectors 22 are connected through inlet port 28 to disperse the reaction gases within the area between the liner and boat. Heating sources 25 surround the furnace tube. A boat 26, typically comprising quartz, placed vertically into the furnace supports a plurality of semiconductor wafers 30, placed horizontally, as shown in a side view in FIG. 3. The boat is essentially open in order to allow nearly unrestricted access of the gases to the wafers.
Referring again to FIGS. 2 and 3, the deposition process begins by positioning a plurality of semiconductor wafers 30 into boat 26, and placing the boat within the furnace on the pedestal 27. The interior of the vertical furnace is heated and the gases are vented through exhaust conduit 29. While the boat and pedestal rotate and are positioned in the specified thermal zone, the appropriate process gases are introduced through gas injectors 22. Inner line 24 contains the reactant gases in close proximity to the semiconductor wafers, and the liner diameter may change along the length of the tube in an attempt to provide the optimum gas flow to the wafers.
A typical gas injector 42, as shown in FIG. 4, is a quartz tube wherein the stem portion 44 enters the furnace tube horizontally as shown in FIG. 2 via port 28, and bends in a near 90 degree angle 41 to form a vertical portion 45 to be positioned between the liner and boat with wafers. The injector length, diameter, and gas exit tip 421 placement, as well as the liner design and material properties, are a function of the CVD process parameters. The combination of these design parameters is aimed primarily at deposition uniformity.
Gas injectors having short vertical rise generally remain well aligned, and present little concern for contact with the liner, wafers or boat. Thermal mismatch which could cause misalignment of the injectors is insignificant because of the short lengths. However, in practice a combination of tube lengths are employed with many deposition processes, and in particular, the tips of long tubes may become misaligned, come into contact with the tube or boat causing particulate generation, or in the worst case, may come into contact with the boat interfering with motion of the boat and wafers thereby causing great damage to both the furnace and the costly wafers.
Gas injectors vary in length from those having a short vertical rise to those of about 13 oomm length. With current injector design and placement, not only is there a danger that the tips can come into contact with the boat, but if the injector becomes misaligned or distorted, it may rub against the liner and contribute to particulate contamination.
Thus, there is a need throughout the industry for gas injectors in semiconductor processing furnaces which remain aligned through multiple thermal processing cycles, which present no probability of contact with either the wafer boat or furnace tube liners, and which avoid contribution to particulate contamination and ultimately to costly reliability and yield losses.